(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of forming a silicon-on-insulator (SOI) device having a body node contact in the fabrication of integrated circuits.
(2) Description of the Prior Art
FIG. 1 illustrates a floating body silicon-on-insulator (SOI) MOSFET. An insulating layer 12 overlies the silicon semiconductor substrate 10. The body node 13 is formed in a silicon layer overlying the insulator layer 12 as are source and drain regions 11. The body node 13 is floating in that it is electrically isolated from the substrate by the underlying insulator layer 12. CMOS devices fabricated using the SOI structure have the advantage of process simplicity. However, to connect the body of the SOI to an external metal line requires the formation of a body connection to be different from the conventional CMOS process. In SOI devices without body contact, such as illustrated in FIG. 1, holes generated by hot electrons during high voltage operation will diffuse toward the source. As the number of holes increases, the parasitic bipolar transistor will be turned on causing additional current to flow from the source to the drain which in turn causes a "kink" effect in the drain current of the MOSFET.
U.S. Pat. Nos. 5,278,102 to Horie and 5,298,434 to Strater et al show methods to form silicon-on-insulator structures in general. "An SOI-DRAM With Wide Operating Voltage Range By CMOS/SIMOX Technology", by K. Suma in IEEE 1994 ISSCC Slide Supplement, pp. 104-105 shows SOI structures and some problems associated with them. U.S. Pat. No. 4,899,202 to Blake et al describes a silicon-on-insulator transistor with a body node to source node connection.